Computer-System-Architecture

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Index

View source code of this repository on GitGub

1. Sample Machines
   • For Diret Instruction-Set
   • For Indiret Instruction-Set
2. Solutions to the Practicle Programs
3. Download CPUSim 3.6.9
4. CPUSim Official

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Practical List

The Header:

{ [OP-Code] [—ADDR—] }

OP-Code: It’s operation code of the instruction which is of 4-bits usually ADDR: It’s the address field where the actual data is stored & has a size of 12-bits

Registers in CPU:

1. AC  
   Accumulator Counter  
   16-bits  
   Mainly used for final computation  

2. PC  
   Program Counter  
   12-bits  
   Used to store of next step i.e. to be executed  

3. IR  
   Information Register  
   16-bits  
   Keeps **entire** data instructions  

4. DR  
   Data Register  
   16-bits  
   It stores actual data (_eg. y = 10_)  

5. AR  
   Address Register  
   12-bits  
   The address is stored here  

6. I  
   Index  
   1-bit  
   Stores the **index** of value/data  

7. S  
   Switch i.e. flip-flop  
   1-bit  
   Stores instruction about Start/Stop flip-flop  

8. E  
   Extra  
   1-bit  
   It stores the carry-bit (_eg. while adding 1+1, E will store '1'_)  

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Instruction cycle for the execution of any program:

a. Fetch: An instruction if fetched from the memory

b. Decode: Decodes the fetched instruction

c. Read: The effective i.e. actual address is extracted from the memory
It’s an instruction that has an Indirect address

d. Execution: Finally the fetched instruction is executed